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Verilog FPGA Lab
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Articles
Title
EE2440-FPGA Lab 01: Basic I/O Correspondence between Switch and LED
EE2440-FPGA Lab 02: Combinational Logic (Comparator/Decoder/Encoder)
EE2440-FPGA Lab 03: Numbers and 7-Segment Display
EE2440-FPGA Lab 04: Parity Checker
EE2440-FPGA Lab 05: Adder/Subtractor
EE2440-FPGA Lab 06: Multiplier (Combinational + Sequential)
EE2440-FPGA Lab 07: 4-bit ALU
EE2440-FPGA Lab 08: Clock, Debounce, Synchronization
EE2440-FPGA Lab 09: Latches and Flip-Flops
EE2440-FPGA Lab 10: Counters
EE2440-FPGA Lab 11: Behavioral Modeling
EE2440-FPGA Lab 12: Finite State Machine (Moore State Machine)
EE2440-FPGA Lab 13: Finite State Machine (Mealy State Machine)
EE2440-FPGA Lab 14: FPGA Memory (M10K / IP)
EE2440-FPGA Lab 15: Register File (RTL Memory)
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