Lab 107 (AI KIT): AIROC CYW43439 Wi-Fi Initialization and Network Connection

Background

Overview of the CYW43439 Wi-Fi Core

The Infineon AIROC CYW43439 chipset is housed inside the Murata LBEE5KL1YN-814 (Type 1YN) module. The Wi-Fi section supports IEEE 802.11b/g/n standards and can achieve PHY data rates of up to 65 Mbps.

Step 1: Power Sequencing Requirements

Before initializing the Wi-Fi communication, the module’s power supplies must be properly sequenced:

  1. Supply Power: The module utilizes a main battery voltage (VBAT) nominally 3.6 V and an IO supply voltage (VIO/VDDIO) typically 1.8 V or 3.3 V.
  2. Ramp and Timing: Ensure that the VBAT voltage ramps up (from 10% to 90%) no faster than 40 microseconds. Furthermore, VBAT must be powered up before or simultaneously with VIO. VIO must never be present or held high before VBAT is stable.

Step 2: WLAN Initialization and Reset

Once power is stable, you must take the Wi-Fi core out of its reset state:

  1. Assert WL_REG_ON: Drive the WL_REG_ON pin high. On the PSoC 6 MCU, this signal is connected to pin P3.[6].
  2. Asserting this pin powers up the internal regulators dedicated to the WLAN section and releases the Wi-Fi core from reset. (Note: Deasserting this pin will hold the WLAN section in reset; it features an internal 200 kΩ pull-down resistor by default.)

Step 3: Configure the SDIO Communication Interface

Unlike Bluetooth (which uses UART), the Wi-Fi core requires a high-speed Secure Digital Input Output (SDIO) interface. You must configure the PSoC 6 MCU's SD Host Controller to communicate via the following pins:

  1. SDIO Clock (SDIO_CLK): Configure PSoC 6 pin P2.[5].
  2. SDIO Command (SDIO_CMD): Configure PSoC 6 pin P2.[4].
  3. SDIO Data Lines (SDIO_DATA_0 to SDIO_DATA_3): For 4-bit SDIO data transfer, configure PSoC 6 pins P2.[0], P2.[1], P2.[2], and P2.[3].

Step 4: Configure Wi-Fi Wake Signals (Power Management)

To optimize power consumption during Wi-Fi operation, configure the host wake GPIO:

  1. Enable WL_HOST_WAKE: Configure PSoC 6 pin P4.[1] as an input.
  2. The Wi-Fi module uses the WL_HOST_WAKE signal to wake the host PSoC 6 MCU from sleep modes when incoming Wi-Fi network data requires processing.

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