GPIO Initialization Configuration

Next, we need to configure all the GPIO ports and pins that are used in the design.

According to the pin connections, complete the following GPIO configurations for each port. Fills the pin field by the value below:

  • 0: Clean the bit
  • 1: Set the bit
  • x: Do not change the bit
  • d: Do not care

For both TM4C123GXL and TM4C1294XL LaunchPads, the Port C [3:0] are used for JTAG/SWD. Therefore, when configuring Port C, use bitwise operators to ensure your new configuration settings do not affect the JTAG/SWD function (PC3 ~ PC0).

Most of the GPIO pins are configured as GPIOs and tri-stated by default (GPIOPCTL = 0, CPIOAFSEL = 0, GPIODIR = 0, GPIOPUR = 0, GPIOPDR = 0, GPIOODR = 0)

  1. Enable Clock to the GPIO Modules (RCGCGPIO register)
    TM4C123G: SYSCTL->RCGCGPIO |= (_PORTs); |= binary = hex
    8 4 2 1   8 4 2 1  
    7 6 5 4   3 2 1 0 bit
    Port F Port E Port D Port C Port B Port A port
    0 0 -  

    TM4C1294: SYSCTL->RCGCGPIO |= (_PORTs); |= binary = hex
    8 4 2 1   8 4 2 1   8 4 2 1   8 4 2 1  
    15 14 13 12   11 10 9 8   7 6 5 4   3 2 1 0 bit
    Port Q Port P Port N   Port M Port L Port K Port J   Port H Port G Port F Port E   Port D Port C Port B Port A port
    0 - - -  
    After enabling the clock signal, check the PRGPIO register until the corresponding bit is set to 1.
    In Assembly:
                LDR     R0, =SYSCTL_PRGPIO_R
    Wait4GPIO   LDR     R1, [R0]
                TST     R1, #(__)
                BEQ     Wait4GPIO
    In c:
    while ( (SYSCTL->PRGPIO & ____ ) != ____ ) {};
  2. Unlock Port
    TM4C123G: PD7 and PF0 are locked after reset.
    TM4C1294: PD7 and PE7 are locked after reset
    If those pins are used in the design, they must be unlocked first. To unlock the port, 0x4C4F434B must be written into the GPIOLOCK register and uncommitted by setting the GPIOCR register.
        8 4 2 1   8 4 2 1            
        7 6 5 4   3 2 1 0 bit          
    Port   Pin 7 Pin 6 Pin 5 Pin 4 - Pin 3 Pin 2 Pin 1 Pin 0 pin Value in Hex   Register   Value to Register
    -           -         =   GPIO ->LOCK = 0x4C4F434B
    - - = GPIO ->CR
    -           -         =   GPIO ->LOCK = 0x4C4F434B
    - - = GPIO ->CR

Convert the above configuration into registers

  1. GPIO Analog Mode Select
    If any pin is used as an Analog signal (check the Signal Type field on table 1), the appropriate bit in AMSEL must be set.
    • 0: Digital signal
    • 1: Analog signal
        8 4 2 1   8 4 2 1            
        7 6 5 4   3 2 1 0 bit          
    Port   Pin 7 Pin 6 Pin 5 Pin 4 - Pin 3 Pin 2 Pin 1 Pin 0 pin Value in Hex   Register   Value to Register
    - - = GPIO ->AMSEL
    - - = GPIO ->AMSEL
    - - = GPIO ->AMSEL
    - - = GPIO ->AMSEL
    - - = GPIO ->AMSEL
    - - = GPIO ->AMSEL
    - - = GPIO ->AMSEL
  2. GPIO Port Control (PCTL)
    The PCTL register selects the specific peripheral signal for each GPIO pin in alternate function mode.
    • 0: GPIO
    • 1~0xF: Check the GPIO Pins and Alternate Function table
    Check the PMCn bit field in the PCTL register from "".
        8421 8421 8421 8421   8421 8421 8421 8421            
        31~28 27~24 23~20 19~16   15~12 11~8 7~4 3~0 bit          
    Port   Pin 7 Pin 6 Pin 5 Pin 4 - Pin 3 Pin 2 Pin 1 Pin 0 pin Value in Hex   Register   Value to Register
    - - = GPIO ->PCTL
    - - = GPIO ->PCTL
    - - = GPIO ->PCTL
    - - = GPIO ->PCTL
    - - = GPIO ->PCTL
    - - = GPIO ->PCTL
    - - = GPIO ->PCTL
  3. GPIO Alternate Function Select (AFSEL)
    Setting a bit in the AFSEL register configures the corresponding GPIO pin to be controlled by PCTL peripheral function.
    • 0: General I/O
    • 1: Pin connected to the digital function defined in the PCTL register

        8 4 2 1   8 4 2 1            
        7 6 5 4   3 2 1 0 bit          
    Port   Pin 7 Pin 6 Pin 5 Pin 4 - Pin 3 Pin 2 Pin 1 Pin 0 pin Value in Hex   Register   Value to Register
    - - = GPIO ->AFSEL
    - - = GPIO ->AFSEL
    - - = GPIO ->AFSEL
    - - = GPIO ->AFSEL
    - - = GPIO ->AFSEL
    - - = GPIO ->AFSEL
    - - = GPIO ->AFSEL
  4. GPIO Pin Direction (DIR)
    Set pin direction
    • 0: Input pin
    • 1: Output pin

        8 4 2 1   8 4 2 1            
        7 6 5 4   3 2 1 0 bit          
    Port   Pin 7 Pin 6 Pin 5 Pin 4 - Pin 3 Pin 2 Pin 1 Pin 0 pin Value in Hex   Register   Value to Register
    - - = GPIO ->DIR
    - - = GPIO ->DIR
    - - = GPIO ->DIR
    - - = GPIO ->DIR
    - - = GPIO ->DIR
    - - = GPIO ->DIR
    - - = GPIO ->DIR
  5. Internal Pull-Up Resistor (PUR), Pull-Down Resistor (PDR), and Open-Drain (ODR)
    PUR: The pull-up control register
    PDR: The pull-down control register
    ODR: The open-drain control register
    • 0: Disable
    • 1: Enable

        8 4 2 1   8 4 2 1            
        7 6 5 4   3 2 1 0 bit          
    Port   Pin 7 Pin 6 Pin 5 Pin 4 - Pin 3 Pin 2 Pin 1 Pin 0 pin Value in Hex   Register   Value to Register
    - - = GPIO ->
    - - = GPIO ->
    - - = GPIO ->
    - - = GPIO ->
    - - = GPIO ->
    - - = GPIO ->
    - - = GPIO ->
  6. GPIO Digital Enable
    Enables all pins used in the design, including GPIO and alternate-function pins.
    • 0: Pin undriven
    • 1: Enable pin

        8 4 2 1   8 4 2 1            
        7 6 5 4   3 2 1 0 bit          
    Port   Pin 7 Pin 6 Pin 5 Pin 4 - Pin 3 Pin 2 Pin 1 Pin 0 pin Value in Hex   Register   Value to Register
    - - = GPIO ->DEN
    - - = GPIO ->DEN
    - - = GPIO ->DEN
    - - = GPIO ->DEN
    - - = GPIO ->DEN
    - - = GPIO ->DEN
    - - = GPIO ->DEN

© 2026 Air Supply Information Center (Air Supply BBS)