Lesson 10: GPIO Port Control Register (GPIOPCTL)

The GPIOPCTL register is used in conjunction with the GPIOAFSEL register and selects the specific peripheral signal for each GPIO pin when using the alternate function mode. Most bits in the GPIOAFSEL register are cleared on reset, therefore most GPIO pins are configured as GPIOs by default. When a bit is set in the GPIOAFSEL register, the corresponding GPIO signal is controlled by an associated peripheral. The GPIOPCTL register selects one out of a set of peripheral functions for each GPIO, providing additional flexibility in signal definition. Following tables are the information on the defined encodings for the bit fields in this register.

 

gpiopctl

 

TM4C123G MCU

EK TM4C123GXL s

I/O Analog
Function
Digital Function (GPIOx->PCTL PMCn Field Encoding)
0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xA 0xB 0xC 0xD 0xE 0xF
0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111
PA0 GPIO U0Rx CAN1Rx
PA1 GPIO U0Tx CAN1Tx
PA2 GPIO SSI0CLK
PA3 GPIO SSI0Fss
PA4 GPIO SSI0Rx
PA5 GPIO SSI0Tx
PA6 GPIO I2C1SCL M1PWM2
PA7 GPIO I2C1SDA M1PWM3
PB0 USB0ID GPIO U1Rx T2CCP0
PB1 USB0VBUS GPIO U1Tx T2CCP1
PB2 GPIO I2C0SCL T3CCP0
PB3 GPIO I2C0SDA T3CCP1
PB4 AIN10 GPIO SSI2Clk M0PWM2 T1CCP0 CAN0Rx
PB5 AIN11 GPIO SSI2Fss M0PWM3 T1CCP1 CAN0Tx
PB6 GPIO SSI2Rx M0PWM0 T0CCP0
PB7 GPIO SSI2Tx M0PWM1 T0CCP1
PC0 GPIO TCK
SWCLK
T4CCP0
PC1 GPIO TMS
SWDIO
T4CCP1
PC2 GPIO TDI T5CCP0
PC3 GPIO TDO
SWO
T5CCP1
PC4 C1- GPIO U4Rx U1Rx M0PWM6 IDX1 WT0CCP0 U1RTS
PC5 C1+ GPIO U4Tx U1Tx M0PWM7 PhA1 WT0CCP1 U1CTS
PC6 C0+ GPIO U3Rx PhB1 WT1CCP0 USB0EPEN
PC7 C0- GPIO U3Tx WT1CCP1 USB0PFLT
PD0 AIN7 GPIO SSI3Clk SSI1Clk I2C3SCL M0PWM6 M1PWM0 WT2CCP0
PD1 AIN6 GPIO SSI3Fss SSI1Fss I2C3SDA M0PWM7 M1PWM1 WT2CCP1
PD2 AIN5 GPIO SSI3Rx SSI1Rx M0FAILT0 WT3CCP0 USB0EPEN
PD3 AIN4 GPIO SSI3Tx SSI1Tx IDX0 WT3CCP1 USB0PFLT
PD4 USB0DM GPIO U6Rx WT4CCP0
PD5 USB0DP GPIO U6Tx WT4CCP1
PD6 GPIO U2Rx M0FAULT0 PhA0 WT5CCP0
PD7 GPIO U2Tx PhB0 WT5CCP1 NMI
PE0 AIN3 GPIO U7Rx
PE1 AIN2 GPIO U7Tx
PE2 AIN1 GPIO
PE3 AIN0 GPIO
PE4 AIN9 GPIO U5Rx I2C2SCL M0PWM4 M1PWM2 CAN0Rx
PE5 AIN8 GPIO U5Tx I2C3SDA M0PWM5 M1PWM3 CAN0TX
PF0 GPIO U1RTS SSI1Rx CAN0Rx M1PWM4 PhA0 T0CCP0 NMI C0o
PF1 GPIO U1CTS SSI1Tx M1PWM5 PhB0 T0CCP1 C1o TRD1
PF2 GPIO SSI1Clk M0FAULT0 M1PWM6 T1CCP0 TRD0
PF3 GPIO SSI1Fss CAN0Tx M1PWM7 T1CCP1 TRCLK
PF4 GPIO M1FAULT0 IDX0 T2CCP0 USB0EPEN
I/O Analog
Function
0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111
0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xA 0xB 0xC 0xD 0xE 0xF
Digital Function (GPIOx->PCTL PMCn Field Encoding)

PD7 and PF0 are configured as GPIO by default but is locked and can only be reprogrammed by unlocking the pin in the GPIOLOCK register and uncommitting it by setting the GPIOCR register.