Lab 07: Multiplexers and Decoders



Required Reading Material

  • Textbook: Digital Design: with an introduction to the Verilog HDL, 5th edition, Mano and Ciletti, ISBN-13: 978-0-13-277420-8
    Chapters 3 and 4
  • Datasheet: 7410, 7493, 74151, 7155

Required Components List

Trnasistor 64 7410 Triple 3-Input NAND × 1
Trnasistor 64 7493 4-bit Ripple Counter × 1
Trnasistor 64 74151 8x1 MUX × 1
Trnasistor 64 74155 Dual 2-to-4 Decoder × 1


This experiment deals with alternative ways to build a combinational circuit (one without storage elements, i.e., no flipflops or registers).

In Exp #7.1, your design (which you will build and test) uses a decoder and a couple of gates. This is a much simpler design approach because most of the gates involved are built into the decoder.

In Exp #7.2, your design (again, to be built and tested) is based on a multiplexer (MUX). No external gates are required, so this is probably the simplest design in the experiment.



Every experiment section that requires you to build a circuit and test it has an asterisk (*). For those sections:

  • For the on-campus lab: Demonstrate the working circuit to your lab instructor.
  • For at-home lab: Post pictures of your circuits in the report.



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