Lab 03: Logic Gates

Basic Logic Functions

There are three basic logic functions from which all circuits can be designed: NOT (invert), OR, and AND. In addition, another useful logic function is exclusive-OR or XOR.

The NOT function is also known as INVERT (so a NOT gate is also called an INVERTER, as explained in Lab 01). The NOT function is true (1) if the input is false (0) and vice versa. The logical expression for the inverse of logic variable X is X (i.e., NOT X).

The logic gate symbol of a NOT/INVERTER is shown below. The triangle without the bubble at the output is called a "buffer gate". It does not change the gate's logic level. Instead, for the same logic level, it may output a load much more current than its input source is capable of.

It is the bubble at the end of the gate that indicates inversion. The bubble on the output of any gate means that the output level generated inside the gate is complemented before it appears at the actual gate output.

The AND function is true (1) only if all inputs are true (1s). The NAND function is an AND-NOT function and the inverse of an AND function. So, a NAND function is false (0) if all inputs are true (1s). Conversely, it is true (1) if one or more inputs are false (0). The logical expression for the AND of two variables, X and Y, is X•Y (or XY). The logical expression for the NAND of X and Y is (X•Y) or (XY). The symbol for a NAND is the same as for an AND except for a bubble at the end (as shown below). So if the inputs to a NAND are all 1s, the internal AND function produces a 1, which is then inverted to a 0 by the bubble.

The OR function is true (1) if one or more inputs are true (1). The NOR function is an OR-NOT function and inverse of an OR function. So, a NOR function is false (0) if one or more inputs are true (1). Conversely, it is true (1) only if all inputs are false (0s). The logic equation for the OR of two logic variables, X and Y, is X+Y. The logic equation for the NOR of X and Y is (X+Y).

The 2-variable (2-input) XOR function is true (1) if either input is true (1) but not both. The XOR is known as an odd function. If an odd number of its inputs are true (1), the output is true (1) – this definition works for any number of inputs. An XNOR is an XOR-NOT function. For a 2-variable (2-input) XNOR function, the function is true (1) if both inputs are the same. The XNOR is an even function. If an even number of inputs are true (1), the output is true (1) – this definition works for any number of inputs.

Notice in the above discussion that the terms true and false are used interchangeably with 1 and 0. The reason is that binary variables like X and Y are really statements about things; they can be true or false. We use 1 or 0 when we deal with them mathematically (as in truth tables or expressions like XY).

Suppose you define variable D as meaning Dry weather, H as meaning Hot weather, and W as meaning Water some plants. Let W = D•H. In other words, water the plants if both D and H are simultaneously true. In a circuit application where the water is to go on automatically when it's dry and hot, you would need sensors to measure humidity and temperature. If the humidity drops below a certain level, we can say that D is true (sensor D goes from 0 to 1, meaning its voltage goes from low to high). Similarly, if the temperature rises above a certain level, we can say that the H is true (sensor H goes from 0 to 1; its voltage goes from low to high).

When both are true, then W = D•H = 1•1 = 1 (i.e., W is true--the water turns on). Sensor output voltages D and H are connected to an AND gate, and when the AND gate output voltage, W, goes high (1), it closes a switch that allows water to flow.

Set up the 7493 as the binary counter of Lab 02. (Ground at least one reset input, or the chip won't count.) Since counter outputs go through all possible combinations in binary order, they can be used to test the behavior of the various gates listed above.

Figure 3.4: Test Circuit

Connect QB and QA to two inputs of a 7408 AND gate. (Do not forget 5V and ground connections; pins 14 and 7. If you forget, the chip is inactive). Referring to the truth tables in 3.1, X = QB, and Y = QA. Connect the clock A input of the counter (pin 14) to the clock signal. Connect QB, QA, to the input of the AND gate, and the output of the AND gate to a LED and verify that the correct outputs are produced by referring to the truth table as shown in Figure 3.5 (or your answer to Exp #3.1).

The truth table and the corresponding waveforms for an AND gate are shown below:

Figure 3.5: The truth table and the corresponding waveforms for an AND gate

Notice that the waveforms are just a graphical form of the truth table (rotated 90 degrees counterclockwise). By displaying such waveforms on a scope, you can obtain a description of circuit behavior equivalent to a truth table.

Actually, you don't need both QB and QA on the scope to know where a complete count cycle starts. It always begins where QB, the MSb (Most Significant bit), falls to 0. Thus, to see how the AND gate output fits into a complete cycle, it only needs to be displayed with QB. (Suppose QA was not shown above. On the scope, you can see that the AND waveform is correctly positioned within a count cycle because it is synchronized with the falling edge of QB.)

Diagrams for gate chips are shown below. Note that all have the same power and ground pin numbers (14 and 7). Also, except for the 7402 (NORs), they have exactly the same input and output pin numbers. So, except for the 7402, no wiring changes will be needed as you replace one gate chip with the next. (Remember to remove chips gently so as not to bend pins, and unplug the +5V power wire .)

Repeat the above for a NOT gate and a 3-input NAND gate. For each chip, connect the Q outputs from the counter to drive the logic gates: QA for the NOT gate and QC, QB, QA for the 3-input NAND. The diagrams for the 7404 chip with six ("hex") inverters and the 7410 chip with 3-input NAND gates are shown below. Don't forget to connect power and ground.

Figure 3.10.1: 7404 Hex Inverter

Figure 3.10.2: 7410 Triple 3-Input NAND Gate

 

The schematics for the NOT and NAND gates are shown below. Connect the inputs of the gates with the appropriate Q output from the counter, i.e., QA for the inverter and QC, QB, QA for the NAND gate.

Figure 3.11.1: Schematic for 7404 NOT Gate.

Figure 3.11.2: Schematic for 7410 3-Input NAND Gate.

Question

5. For each gate, draw the wiring diagram in your lab report.
6. Connect the Oscilloscope/ADALM1000 device to the circuit, and verify the output of the gates that they match your truth table values from Exp #3.1. Screenshot the oscilloscope waveforms and paste them into your report.
   
   1. For the 7404 NOT gate, connect QA to AIN (channel 1) , and the output of the NOT gate to BIN (channel 2) of the Oscilloscope/ADALM1000 device.
   2. For the 7410 NAND gate, connect QC (the MSb, most significant input bit) to AIN (channel 1), and the output of the NAND gate to BIN (channel 2) of the Oscilloscope/ADALM1000 device.
      Note: since the 7410 NAND has 3 inputs, the counter goes through 8 counts (000 through 111 and back). So, the QC will be low for 4 counts and high for 4 counts before it repeats.