Lesson 01: Create a New FPGA Project using Quartus Prime Standard
This tutorial will teach you how to create an FPGA design and test the design by using Intel Quartus Prime software. Let us create an FPGA project for 2-to1 Multiplexer using Verilog HDL.
Creating a Project
You can create a new project by clicking New Quartus Prime Project on the File ➤ New... menu. When creating a new project, you specify the working directory for the project, assign the project name, and designate the name of the top-level design entity. You can also specify which design files, other source files, user libraries, and EDA tools you want to use in the project, as well as the target device.
- Launch Quartus (Quartus Prime 1x.xx) Standard Edition
There should be a desktop icon. Otherwise, search through the Windows Start menu to find it.
- Start the New Project Wizard
In the Quartus Prime window, click on the menu File ➤ New..., select on Quartus Prime Project, then click on OK button.
- Next, the Introduction page opens. Click on the Next button.
- Select the Working Directory, Project Name, and Top-Level Design Entity Name
In the next screen, enter a directory in which you will store your Quartus Prime project files for this design, for example, R:\EE4480\MyFirstFPGA.
Enter the project name, type MyFirstFPGA.
Enter the name of the top-level design entity for this project. By default, this name is the same as the project name. Here, I would recommend adding "_top" at the end of the name, so you can easy to recognize which file is the top-level module file. Here, you can type MyFirstFPGA_top.
Note: A window may pop up starting that the chosen working directory does not exist. Click Yes to create it.
Don't use any space or special characters in the file, and project names. Use an underscore ( _ ) if you need to put a space in your file or project name.
- Next, you have to select the project type. Please select the Empty project, then click on the Next button.
- In the next dialog, click Next again as we will not be adding any preexisting design files at this time.
- Select the Family and Device Settings
Select the family and device you used for this project, then click on Next button.
- From the pull-down menu labeled Device family, select MAX 10(DA/DF/DC/SA/SC).
- In the list of available devices:
- If you are using , please select 10M50DAF484C7G device.
- If you are using , please select 10M08DAF484C8GES device.
- Click Next
- In the EDA Tool Settings dialog, select Simulation Tool Name to ModelSim-Altera, and Format(s) to Verilog HDL. Then click Next.
- Finally, the New Project Wizard will show you a summary of this project. Click Finish to complete the New Project Wizard.