Lesson A01: DE10-Lite Board
The DE10-List development board includes the following hardware:
- On-board USB Blaster
- 3-axis accelerometer
- 4-bit resistor-network DAC for VGA
- Two user-defined push-buttons with debounced
- 10 slide switches
- 10 red LEDs
- 6 seven-segment displays
- Arduino Uno R3 compatible connector, including 6 ADC channels
- 64MB SDRAM, x16 bits data bus
- 2x20 GPIO header
Figure 1 shows the block diagram of the DE10-List board.
Figure 1: DE10-Lite Board Block Diagram
Clock Circuitry
The DE10-Lite board has a 24 MHz oscillator, which is connected to a clock generator, CDCE937. The clock generator is used to distribute clock signals with low jitter, and provides the following clock signals to the FPGA board:
- The two 50 MHz clock signals connected to the FPGA are used as clock sources for user logic.
- One 24 MHz clock signal is connected to the clock inputs of USB microcontroller of USB Blaster.
- One 10 MHz clock signal is connected to the PLL1 and PLL3 of FPGA, the outputs of these two PLLs can drive ADC clock.
Figure 2 shows the default frequency of all external clocks to the MAX 10 FPGA.
Figure 2: Clock Circuit of the MAX10-Lite Board
Table 1: Pin Assignment of Clock Inputs
| Signal Name | FPGA Pin # | Description | I/O Standard |
|---|---|---|---|
| ADC_CLK_10 | PIN_N5 | 10 MHz clock input for ADC (Bank 3B) | 3.3-V LVTTL |
| MAX10_CLK1_50 | PIN_P11 | 50 MHz clock input (Bank 3B) | 3.3-V LVTTL |
| MAX10_CLK2_50 | PIN_N14 | 50 MHz clock input (Bank 3B) | 3.3-V LVTTL |
Do not modify the clock generator settings. The incorrect setting will cause the system to not work.
User-Defined Push Buttons
The DE10-Lite board includes two user-defined push-buttons that allow users to interact with the MAX 10 FPGA. Each of these switches is connected as negative logic input with pull-up resistors on the board, as shown in Figure 3.
Figure 3: Connection between the Push-Button and MAX 10 FPGA
Table 2: Pin Assignment of Push-Buttons
| Signal Name | FPGA Pin # | Description | I/O Standard |
|---|---|---|---|
| KEY[0] | PIN_B8 | Push-button[0] | 3.3-V Schmitt Trigger |
| KEY[1] | PIN_A7 | Push-button[1] | 3.3-V Schmitt Trigger |
Seven-Segment Displays
The DE10-Lite board has six 7-segment displays to display numbers. Each seven-segment display consists of seven LED bars and a single LED round for the decimal point. The DE10-Lite board uses the common anode (CA) method for its displays. This means that all the anodes are tied together and connected to the power source. The segment can be turned ON or OFF by applying a low logic level or high level from the FPGA, respectively. Figure 6 shows the connection of seven-segments to pins on MAX 10 FPGA.
Figure 6: Connections between the 7-Segment Display HEX0 and the MAX 10 FPGA
MAX10 Device Resources
| Resources | Device | |||||||
|---|---|---|---|---|---|---|---|---|
| 10M02 | 10M04 | 10M08 | 10M16 | 10M25 | 10M40 | 10M50 | ||
| Logic Elements (LE) (K) | 2 | 4 | 8 | 16 | 25 | 40 | 50 | |
| M9K Memory (Kb) | 108 | 189 | 378 | 549 | 675 | 1,260 | 1,638 | |
| User Flash Memory (Kb) | 96 | 1,248 | 1,376 | 2,368 | 3,200 | 5,888 | 5,888 | |
| 18 × 18 Multiplier | 16 | 20 | 24 | 45 | 55 | 125 | 144 | |
| PLL | 2 | 2 | 2 | 4 | 4 | 4 | 4 | |
| GPIO | 246 | 246 | 250 | 320 | 360 | 500 | 500 | |
| LVDS | Dedicated Transmitter |
15 | 15 | 15 | 22 | 24 | 30 | 30 |
| Emulated Transmitter |
114 | 114 | 116 | 151 | 171 | 241 | 241 | |
| Dedicated Receiver | 114 | 114 | 116 | 151 | 171 | 241 | 241 | |
| Internal Configuration Image | 1 | 2 | 2 | 2 | 2 | 2 | 2 | |
| ADC | — | 1 | 1 | 1 | 2 | 2 | 2 | |
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