KB05: Troubleshooting a Circuit using Maps

 

This section is designed to be used in situations where counter outputs are used to test a circuit by applying all possible input combinations in a binary sequence. Assume the counter is triggered with a square pulse output, where the circuit output is monitored with an LED.

Suppose you build a circuit for the function F = X Y Z + Y Z + X Y. Since a 3-input AND is not available, two 2-input ANDs are required for the first term; i.e. (X • Y) • Z. The last two terms require two more ANDs, so together with the two OR gates (+, +), a total of 6 gates are needed.

The map for F, derived from the equation, is the below.

Now suppose that you build the circuit from the equation for F and drive it with outputs from the counter. You then record values for F as the counter goes through all 8 combinations in binary order. You insert F values into a map and get the result shown at right. Since the two maps don't match, there's an error in the circuit.

Naturally, you could check connections among all the gates to see what's wrong. But it may also be possible to find the error instead of the differences between the two maps.

Note that the 1 in square 6 of the original map has moved to square 5, so that F = X Y Z + Y Z + X Z.

Conclusion: X Y in the original expression for F is replaced by X Z, implying that Z was mistakenly connected to the last AND gate (the last term in F) instead of Y.

(This method is fairly quick if only one incorrect connection is made to an AND gate, as in this case and the next.)

As another example, suppose your measured values for F lead to this map (the 1 in square 6 appears instead in square 2). By grouping the 1's as shown, this could be simplified as F = X Y + Y Z. But that would imply a design of form F = xx + xx (2 ANDs and 1 OR) which is not like the circuit you built where F = xxx + xx + xx.

So rather than over-simplify, try instead to maintain the form of the original equation if possible. Grouping the 1's as in the lower map, we get F = X Y Z + Y Z + X Z.

Here the mistake was connecting X to the last gate instead of X.